This program is tentative and subject to change.

Mon 21 Oct 2024 11:50 - 12:10 at Pasadena - Pre-lunch Session Chair(s): Rajiv Gupta

As global computational demand continues to rise, modern multicore architectures play a pivotal role in achieving and providing optimal runtime and energy efficient computing solutions. However, optimizing for both performance and energy efficiency remains a challenge. In addition, developing parallel code and optimizing for different architecture is often time consuming. The OSCAR (Optimally Scheduled Advanced Multiprocessor) compiler, an automatic parallelizing source-to-source compiler, is able to leverage multigrain parallelism to enhance multicore efficiency on a variety of architectures. This allows it to reduce runtime and energy consumption by exploiting parallelism. Furthermore, using data and control dependency analysis in addition to scheduling features, it can apply cache optimization and data localization techniques to further reduce energy consumption by improving runtime. This paper evaluates the OSCAR compiler versus OpenMP in the ability to reduce energy usage by reducing runtime of scientic benchmarks from SPEC2000 and NAS Parallel Benchmarks suites. It will be be done on Intel Icelake-SP and AMD Zen-4 16-core processors. Results showed OSCAR providing runtime and total energy improvements compared to OpenMP. Benchmarks such as NAS’s CG demonstrated a 10.6x performance increase and 80% energy savings compared to the sequential benchmark on both systems. In comparison to OpenMP at varying equivalent core count, OSCAR provided a 7% to 9% runtime improvement with a 4% to 9% reduction in energy on both systems across benchmarks. The cache optimization and data localization was shown to have provided a 4% runtime improvement and 4% to 7% energy improvement with OSCAR. This was driven by a reduction in L3 cache misses, translating to a runtime and energy improvement. This was achievable at varying core configurations up to the max amount of cores available on the systems.

This program is tentative and subject to change.

Mon 21 Oct

Displayed time zone: Pacific Time (US & Canada) change

11:00 - 12:30
Pre-lunch SessionVIVEKFEST at Pasadena
Chair(s): Rajiv Gupta University of California at Riverside (UCR)
11:00
20m
Research paper
Intrepydd: Toward Performance, Productivity, and Portability for Massive Heterogeneous Parallelism
VIVEKFEST
Jun Shirako Georgia Institute of Technology, Tong Zhou Georgia Institute of Technology, Akihiro Hayashi Georgia Institute of Technology
11:20
20m
Research paper
Verification of Concurrent Programs Using Hybrid Concrete-Symbolic Interpretation
VIVEKFEST
Emily Tucker , Louis-Noël Pouchet Colorado State University, USA
11:40
10m
Talk
Nandivada Krishna (IIT Madras)
VIVEKFEST
11:50
20m
Research paper
Evaluation of Speedup & Energy with Multigrain Parallelizing Compiler
VIVEKFEST
John Pickar , Tohma Kawasumi , Hiroki Mikami Waseda University, Japan, Keiji Kimura Waseda University; Japan, Hironori Kasahara Waseda University, Japan
12:10
20m
Research paper
A Formal Model for Portable, Heterogeneous Accelerator Programming
VIVEKFEST
Zachary Sullivan , Samuel D. Pollard Sandia National Laboratories